Kevin J. Hess
39Patents
10h-index
37Co-inventors
75Inventor score
Filing activity: Nov 26, 2002 → Dec 5, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7355289B2 | Packaged integrated circuit with enhanced thermal dissipation | Electricity | 54 | Active |
| US7632715B2 | Method of packaging semiconductor devices | Electricity | 41 | Active |
| US7129566B2 | Scribe street structure for backend interconnect semiconductor wafer integration | Electricity | 39 | Expired |
| US9446858B2 | Apparatus and methods for tethered aerial platform and system | Performing Operations; Transporting | 23 | Active |
| US6933614B2 | Integrated circuit die having a copper contact and method therefor | Electricity | 18 | Expired |
| US7572680B2 | Packaged integrated circuit with enhanced thermal dissipation | Electricity | 17 | Active |
| US7374971B2 | Semiconductor die edge reconditioning | Electricity | 17 | Expired |
| US6921979B2 | Semiconductor device having a bond pad and method therefor | Electricity | 15 | Expired |
| US7276435B1 | Die level metal density gradient for improved flip chip package reliability | Electricity | 13 | Active |
| US9076664B2 | Stacked semiconductor die with continuous conductive vias | Electricity | 10 | Active |
| US7626276B2 | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance | Electricity | 9 | Active |
| US7829997B2 | Interconnect for chip level power distribution | Electricity | 9 | Active |
| US7247552B2 | Integrated circuit having structural support for a flip-chip interconnect pad and method therefor | Electricity | 8 | Expired |
| US7821104B2 | Package device having crack arrest feature and method of forming | Electricity | 7 | Active |
| US8349666B1 | Fused buss for plating features on a semiconductor die | Electricity | 7 | Active |
| US7750465B2 | Packaged integrated circuit | Electricity | 5 | Active |
| US7550318B2 | Interconnect for improved die to substrate electrical coupling | Electricity | 5 | Active |
| US8129226B2 | Power lead-on-chip ball grid array package | Electricity | 4 | Active |
| US8501539B2 | Semiconductor device package | Electricity | 4 | Active |
| US8105933B2 | Localized alloying for improved bond reliability | Electricity | 4 | Active |
| US7241636B2 | Method and apparatus for providing structural support for interconnect pad while allowing signal conductance | Electricity | 3 | Expired |
| US8680674B2 | Methods and structures for reducing heat exposure of thermally sensitive semiconductor devices | Electricity | 3 | Active |
| US7857137B2 | Wound care kit | Human Necessities | 3 | Active |
| US8368172B1 | Fused buss for plating features on a semiconductor die | Electricity | 2 | Active |
| US8791582B2 | Integrated circuit package with voltage distributor | Electricity | 2 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.