Wafer level global bitmap characterization in integrated circuit technology development
US7137085B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 1, 2004 |
| Grant date | Nov 14, 2006 |
| Priority date | — |
| Expiry date | Nov 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318511
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system and method for wafer level global bitmap characterization include determining chip level defect data bitmaps from a semiconductor wafer, and consolidating the chip level defect data bitmaps into a global wafer level bitmap that characterizes substantially the entire wafer failure configuration. The global wafer level bitmap is then analyzed and compared with other global wafer level bitmaps to develop correlations thereamong and develop global wafer level bitmap definitions for conducting at least one of wafer-to-wafer, boat-to-boat, and lot-to-lot process analysis based upon the global wafer level bitmap definitions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.