Fabrication method of semiconductor integrated circuit device
US7144755B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 19, 2004 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Aug 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
At the time of performing resin molding for a matrix frame in the fabrication of semiconductor integrated circuit devices, a predetermined amount of air is fed into each of first cavities in a first row and second cavities in a second row, the first and second cavities being formed in a matrix arrangement in a lower mold of a molding die, so as to pressurize the interiors of the cavities, and a sealing resin is charged into the cavities, while the pressure therein is regulated in such a manner that the charging speeds of the sealing resin become equal in all of the cavities, whereby it is possible to stabilize the quality of the product being obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.