Method of manufacturing semiconductor integrated circuit device having polymetal gate electrode
US7144766B2 · kind B2 · utility
6Cited by
11References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2005 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Aug 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
When an oxidation treatment for regenerating a gate insulating film 6 is performed after forming gate electrodes 7A of a polymetal structure in which a WNx film and a W film are stacked on a polysilicon film, a wafer 1 is heated and cooled under conditions for reducing a W oxide 27 on the sidewall of each gate electrode 7A. As a result, the amount of the W oxide 27 to be deposited on the surface of the wafer 1 is reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.