Method and apparatus for controlling clocks in a processor with mirrored units
US7146520B2 · kind B2 · utility
2Cited by
6References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 12, 2003 |
| Grant date | Dec 5, 2006 |
| Priority date | — |
| Expiry date | Jan 7, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/04
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and apparatus for operating a clock in a processor having asymmetrically mirrored base-mirror units is disclosed. The method includes initializing a base-unit and a mirror-unit of the processor to the same state, and starting the mirror-unit-clock one clock cycle later than the base-unit-clock.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.