Memory array of a non-volatile RAM
US7149108B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2005 |
| Grant date | Dec 12, 2006 |
| Priority date | — |
| Expiry date | Feb 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/32
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Non-volatile memory cell with a single semiconductor device per memory cell. The present invention generally allows for a plurality of memory cells to be formed on a semiconductor substrate that supports a semiconductor device. A multi-resistive state material layer that changes its resistive state between a low resistive state and a high resistive state upon application of a voltage pulse is formed above the substrate, generally at a very high temperature. While the layers fabricated between the substrate and the multi-resistive state material use materials that can withstand high temperature processing, the layers fabricated above the multi-resistive state material do not need to withstand high temperature processing.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.