Method of fabricating a storage gate pixel design
US7153719B2 · kind B2 · utility
14Cited by
8References
34Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 24, 2004 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Dec 2, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/18
Abstract
A method of fabricating a pixel cell having a shutter gate structure. First and second charge barriers are respectively created between a photodiode and a first charge storage region and between the first storage region and a floating diffusion region. A global shutter gate is formed to control the charge barrier and transfer charges from the photodiode to the first charge storage region by effectively lowering the first charge barrier. A transfer transistor acts to transfer charges from the first storage region to the floating diffusion region by reducing the second charge barrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.