Semiconductor integrated circuit device
US7154788B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Nov 24, 2004 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Nov 24, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is achieved a high-integrated and high-speed nonvolatile memory which can stabilize an operation of a phase-change memory for a short operation cycle time. A latch is provided in a write driver. A change to a high-resistance state of a phase-change element is performed per column cycle by a write-enable signal, and a change to a low-resistance state thereof is performed after a pre-charge command is inputted and concurrently with deactivation of a pre-charge signal. Thereby, a write time to a memory cell in which phase-change resistance is changed to a low-resistance state, and a period from a write operation for changing the phase-change resistance to a high-resistance state to a read operation to the above memory cell can be lengthened without extending the column cycle time, so that the stable write operation is achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.