Semiconductor integrated circuit and IC card
US7154804B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Mar 17, 2006 |
| Grant date | Dec 26, 2006 |
| Priority date | — |
| Expiry date | Mar 17, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2227
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit has a memory which can enter active state or standby state, and the memory has voltage generation circuits for bit lines and source lines with which memory cells are connected. The voltage generation circuits make the potential of the bit lines and the potential of the source lines equal to each other in response to an instruction to transition from active state to standby state. The voltage generation circuits produce a potential difference between the bit lines and the source lines in response to an instruction to transition from standby state to active state. In standby state, the potential of the bit lines and that of the source lines are equal to each other. Therefore, sub-threshold leakage does not occur between the source and drain of each memory cell. In active state, the source line potential is not varied.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.