Triple pulse method for MRAM toggle bit characterization
US7158407B2 · kind B2 · utility
6Cited by
5References
20Claims
0Family size
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Key dates
| Filing date | Apr 29, 2005 |
| Grant date | Jan 2, 2007 |
| Priority date | — |
| Expiry date | Jun 21, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/56
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method is provided for testing magnetic bits (3, 104, 514) of an array. A train of first (702), second (704), and third (706) pulses is provided to a desired bit, the first and second pulses beginning at a substantially similar low field and increasing in similar amounts with respect to successive trains of the first, second, and third pulses, the third pulse having a current amplitude sufficient to toggle the magnetic bit. A representative count is recorded in response to switching of the bit. The above steps are repeated and a determination is made of the current amplitude required to write and toggle the bit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.