Transistor device and methods of manufacture thereof
US7160781B2 · kind B2 · utility
1Cited by
19References
22Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 21, 2005 |
| Grant date | Jan 9, 2007 |
| Priority date | — |
| Expiry date | Mar 21, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming transistor devices and structures thereof are disclosed. A first dielectric material is formed over a workpiece, and a second dielectric material is formed over the first dielectric material. The workpiece is annealed, causing a portion of the second dielectric material to combine with the first dielectric material and form a third dielectric material. The second dielectric material is removed, and a gate material is formed over the third dielectric material. The gate material and the third dielectric material are patterned to form at least one transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.