Method for forming a dual damascene structure
US7169695B2 · kind B2 · utility
8Cited by
36References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2003 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Apr 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76831
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a dual damascene feature is provided. Vias are formed in an etch layer. A trench patterned mask is provided over the etch layer. A trench is etched, where the etching the trench comprises a cycle of forming protective sidewalls over the sidewalls of the vias and etching a trench through the trench patterned mask. The mask is then stripped.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.