Flexible and area efficient column redundancy for non-volatile memories
US7170802B2 · kind B2 · utility
128Cited by
36References
26Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2003 |
| Grant date | Jan 30, 2007 |
| Priority date | — |
| Expiry date | Aug 19, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/848
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory wherein bad columns in the array of memory cells can be removed. Substitute redundant columns can replace the removed columns. Both of these processes are performed on the memory in a manner that is externally transparent and, consequently, need not be managed externally by the host or controller to which the memory is attached. The bad column can be maintained on the memory. At power up, the list of bad columns is used to fuse out the bad columns. The memory may also contain a number of redundant columns that can be used to replace the bad columns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.