Method and system for etching a film stack
US7172969B2 · kind B2 · utility
7Cited by
11References
28Claims
0Family size
Assignees
Inventors
Key dates
| Filing date | Aug 26, 2004 |
| Grant date | Feb 6, 2007 |
| Priority date | — |
| Expiry date | Sep 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/28123
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method and system is described for preparing a film stack, and forming a feature in the film stack using a plurality of dry etching processes. The feature formed in the film stack can include a gate structure having a critical dimension of approximately 25 nm or less. This critical dimension can be formed in the polysilicon layer using four mask layers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.