Method of fabricating an electronic component having at least one semiconductor chip on a circuit carrier with elastic external contacts
US7176059B2 · kind B2 · utility
3Cited by
6References
6Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 12, 2005 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Sep 12, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49204
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component includes at least one semiconductor chip, which has an active chip top side with contact areas and has a chip rear side arranged on a carrier top side of a circuit carrier. The circuit carrier and the chip top side are covered by a common rewiring layer having external contact areas at a different level. The different level is matched to a common level of external contact top sides by means of different heights of in part compliant external contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.