Technique for forming transistors having raised drain and source regions with different heights
US7176110B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2004 |
| Grant date | Feb 13, 2007 |
| Priority date | — |
| Expiry date | Jun 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0212
Abstract
The height of epitaxially grown semiconductor regions in extremely scaled semiconductor devices may be adjusted individually for different device regions in that two or more epitaxial growth steps may be carried out, wherein an epitaxial growth mask selectively suppresses the formation of a semiconductor region in a specified device region. In other embodiments, a common epitaxial growth process may be used for two or more different device regions and subsequently a selective oxidation process may be performed on selected device regions so as to precisely reduce the height of the previously epitaxially grown semiconductor regions in the selected areas.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.