Electroless plating method and semiconductor wafer on which metal plating layer is formed
US7179741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 2003 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Aug 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2221/1089
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
It is an object of the present invention to provide a semiconductor wafer on which a thin, smooth, uniform and good adhesive electroless plating layer that can be suitable for a seed layer is formed, and to provide an electroless plating method which is suitable for use in the manufacture of such a semiconductor wafer.A semiconductor wafer is coated with a silane coupling agent which has a functional group that is able to capture a metal, and is further coated with an organic-solvent solution of a palladium compound such as palladium chloride or the like. Afterward, the wafer is electroless plated. As a result of such an electroless plating method, a semiconductor wafer having a thickness of 70 to 5000 angstroms and a mean surface roughness Ra of 10 to 100 angstroms can be obtained.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.