Test device for wafer testing digital semiconductor circuits
US7180313B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 24, 2004 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Nov 24, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
The invention relates to a test device for testing digital semiconductor circuits at wafer level having a probe card which sends/receives digital test signals to/from a test head and distributes signal channels, carrying test signals, to the respective location on the wafer via an interposer. The interposer has a printed circuit board with contact pins on both sides, and a needle or contact stud card. Additionally, all signal channels in the test device or signal channels which carry time-critical test signals in the test device contain a respective signal amplifier, the signal amplifiers preferably being digital signal amplifiers which are mounted on the printed circuit board of the interposer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.