Nonvolatile semiconductor memory device
US7180788B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 7, 2005 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Jan 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile semiconductor memory device provides for higher integration by reducing the area of occupation of direct peripheral circuits, in which the memory cell of an AND type flash memory includes a selection gate, a float gate, a control gate that functions as a word line, and an n-type semiconductor region (source, drain) that functions as a local bit line. A pair of local bit lines adjacent to each other in a memory mat are connected with one global bit line at one end in the direction of the column of the memory mat, and a selection MOS transistor, formed by one enhancement type MOS transistor and one depletion type MOS transistor; is connected in series with each of the pair of local bit lines. One of the local bit lines is selected by turning the selection MOS transistor on/off.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.