Patent · US Expired

Method for comparing the address of a memory access with an already known address of a faulty memory cell

US7181643B2 · kind B2 · utility

6Cited by

10References

2Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Robert Kaiser · Kaufering, DE
Florian Schamberger · Bad Reichenhall, DE

Key dates

Filing date	Oct 20, 2003
Grant date	Feb 20, 2007
Priority date	—
Expiry date	Feb 10, 2025

Classification

Technology area (CPC G)Physics
CPC primaryG11C8/00
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A comparison method compares the address of a memory cell with a known address of a faulty memory cell in a semiconductor memory module. The module is subdivided into banks and has an address structure in which each address is associated with a bank that is organized in rows and columns and is defined by a row address, a column address and a bank address. Not only the row address is determined, but also the column address and the bank address when a memory access occurs. A bank is activated with a bank selection signal, and the access to a valid address of a faulty memory cell is indicated by an enable register.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.