Method for fabricating semiconductor components using mold cavities having runners configured to minimize venting
US7186589B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2004 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Jul 19, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/53178
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system for fabricating semiconductor components includes mating mold cavity plates having mold cavities configured to mold body segments of the semiconductor components on either side of a leadframe. The mold cavity plates also include runners configured to direct molding compound between the mold cavities and into the corners of the mold cavities. The runners prevent trapped air from accumulating in the corners of the mold cavities, and eliminate the need for air vents in the corners. The mold cavity plates also include dummy mold cavities configured to form dummy segments on the leadframe, and air vents in flow communication with the dummy segments. The dummy mold cavities are configured to collect trapped air, and to direct the trapped air through the air vents to atmosphere. Each dummy mold cavity has only a single associated air vent, such that cleaning is facilitated, and flash particles from the air vents are reduced. A method for fabricating semiconductor components includes a molding step performed using the system. A semiconductor component fabricated using the system includes the leadframe, a die, upper and lower body segments encapsulating the die, and dummy segments …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.