Method and apparatus for protecting an integrated circuit from erroneous operation
US7187600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 22, 2004 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Mar 3, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/104
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing system (10) has an embedded non-volatile memory (22) that is programmed and erased by use of a high voltage provided by a charge pump (78). In order to prevent the non-volatile memory (22) from being inadvertently programmed or erased during low power supply voltage conditions, the charge pump (78) is disabled and discharged when the power supply voltage drops below a predetermined value. This is accomplished by enabling a low voltage detect circuit (110) in response to a program or erase operation being initiated. A control register (76) will provide a high voltage enable signal to the charge pump (78) only when a power supply valid signal is received. In another embodiment, the low voltage detect circuit (110) may be enabled by another condition to protect the data processing system (10) from an authorized access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.