Sequential station tool for wet processing of semiconductor wafers
US7189647B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2003 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Oct 24, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods and apparatus are provided for processing semiconductor wafers sequentially. Sequential processes employ multi-station processing modules, where particular encompassing wafer processes are divided into sub-processes, each optimized for increasing wafer to wafer uniformity, result quality, and overall wafer throughput. In one example, a copper electroplating module includes separate stations for wetting, initiation, seed layer repair, fill, overburden, reclaim, and rinse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.