Semiconductor structure integrated under a pad
US7190077B2 · kind B2 · utility
3Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Feb 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3025
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated semiconductor structure has a substrate, a semiconductor element located on the substrate, a pad metal, metal layers located between the pad metal and the substrate, and insulation layers that separate the metal layers from one another. The pad metal extends over at least—part of the semiconductor element.Below the surface of the pad metal, at least the top two metal layers include two or more adjacent interconnects.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.