Method of forming a semiconductor structure with non-uniform metal widths
US7192857B1 · kind B1 · utility
4Cited by
4References
18Claims
0Family size
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Key dates
| Filing date | Apr 20, 2005 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Jul 7, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power transistor structure uses metal drain and source strips with non-uniform widths to reduce variations in current density across the power transistor structure. The reductions in current density, in turn, reduce the source-to-drain turn on resistance and maximize the overall current carrying capacity of power transistor structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.