Damascene copper wiring image sensor
US7193289B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 30, 2004 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Nov 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/811
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An image sensor array and method of fabrication wherein the sensor includes Copper (Cu) metallization levels allowing for incorporation of a thinner interlevel dielectric stack with improved thickness uniformity to result in a pixel array exhibiting increased light sensitivity. In the sensor array, each Cu metallization level includes a Cu metal wire structure formed at locations between each array pixel and, a barrier material layer is formed on top each Cu metal wire structure that traverses the pixel optical path. By implementing a single mask or self-aligned mask methodology, a single etch is conducted to completely remove the interlevel dielectric and barrier layers that traverse the optical path. The etched opening is then refilled with dielectric material. Prior to depositing the refill dielectric, a layer of either reflective or absorptive material is formed along the sidewalls of the etched opening to improve sensitivity of the pixels by either reflecting light to the underlying photodiode or by eliminating light reflections.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.