Simulation of integrated circuitry within a high-level modeling system using hardware description language circuit descriptions
US7194705B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2003 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Jan 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Method, apparatus, and computer readable medium for simulating an integrated circuit within a modeling system using one or more circuit description language representations of circuitry is described. By example, a circuit description language representation of the one or more circuit description language representations of circuitry is translated into a program language circuit description. A first simulation process is executed and input data is obtained therefrom. A second simulation process is executed with the input data as parametric input to produce output data, the second simulation process being derived from the program language circuit description. The output data produce by the second simulation process is provided to the first simulation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.