System and method for plasma induced modification and improvement of critical dimension uniformity
US7196014B2 · kind B2 · utility
5Cited by
7References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2004 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Mar 25, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31144
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Novel interconnect structures possessing a OSG or polymeric-based (90 nm and beyond BEOL technologies) in which advanced plasma processing is utilized to reduce post lithographic CD non-uniformity (“line edge roughness”) in semiconductor devices. The novel interconnect structure has enhanced liner and seed conformality and is therefore capable of delivering improved device performance, functionality and reliability.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.