Nicholas C. M. Fuller
71Patents
10h-index
103Co-inventors
77Inventor score
Filing activity: May 14, 2004 → Oct 3, 2019
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9324650B2 | Interconnect structures with fully aligned vias | Electricity | 76 | Active |
| US9405582B2 | Dynamic parallel distributed job configuration in a shared-resource environment | Physics | 33 | Active |
| US8084825B2 | Trilayer resist scheme for gate etching applications | Electricity | 20 | Active |
| US7739218B2 | Systems and methods for building and implementing ontology-based information resources | Physics | 19 | Active |
| US7435671B2 | Trilayer resist scheme for gate etching applications | Electricity | 18 | Active |
| US7943480B2 | Sub-lithographic dimensioned air gap formation and related structure | Electricity | 15 | Active |
| US7402463B2 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application | Electricity | 14 | Active |
| US8871107B2 | Subtractive plasma etching of a blanket layer of metal or metal alloy | Electricity | 13 | Active |
| US8633117B1 | Sputter and surface modification etch processing for metal patterning in integrated circuits | Electricity | 13 | Active |
| US8618036B2 | Aqueous cerium-containing solution having an extended bath lifetime for removing mask material | Physics | 11 | Active |
| US10467586B2 | Blockchain ledgers of material spectral signatures for supply chain integrity management | Electricity | 10 | Active |
| US8367556B1 | Use of an organic planarizing mask for cutting a plurality of gate lines | Electricity | 8 | Active |
| US7816275B1 | Gate patterning of nano-channel devices | Emerging Cross-Sectional Technologies | 7 | Active |
| US9582189B2 | Dynamic tuning of memory in MapReduce systems | Physics | 7 | Active |
| US8159042B2 | Adopting feature of buried electrically conductive layer in dielectrics for electrical anti-fuse application | Electricity | 7 | Active |
| US8455366B1 | Use of an organic planarizing mask for cutting a plurality of gate lines | Electricity | 7 | Active |
| US7371461B2 | Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics | Emerging Cross-Sectional Technologies | 7 | Expired |
| US10685323B2 | Blockchain ledgers of material spectral signatures for supply chain integrity management | Electricity | 6 | Active |
| US7435676B2 | Dual damascene process flow enabling minimal ULK film modification and enhanced stack integrity | Electricity | 6 | Active |
| US7196014B2 | System and method for plasma induced modification and improvement of critical dimension uniformity | Electricity | 5 | Expired |
| US7282441B2 | De-fluorination after via etch to preserve passivation | Electricity | 5 | Expired |
| US7811926B2 | Multilayer hardmask scheme for damage-free dual damascene processing of SiCOH dielectrics | Emerging Cross-Sectional Technologies | 5 | Active |
| US9911690B2 | Interconnect structures with fully aligned vias | Electricity | 5 | Active |
| US10721328B2 | Offering application program interfaces (APIs) for sale in cloud marketplace | Electricity | 4 | Active |
| US7352064B2 | Multiple layer resist scheme implementing etch recipe particular to each layer | Electricity | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.