Chemical mechanical polish of PCMO thin films for RRAM applications
US7205238B2 · kind B2 · utility
56Cited by
4References
5Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 21, 2004 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Mar 16, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B63/30
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of fabricating a CMR layer in a CMOS device using CMP to pattern the CMR layer includes preparing a silicon substrate, including fabrication of a bottom electrode in the silicon substrate; depositing a layer of SiNx on the substrate; patterning and etching the SiNx layer to form a damascene trench over the bottom electrode; depositing a layer CMR material over the SiNx and in the damascene trench; removing the CMR material overlying the SiNx layer by CMP, leaving the CMR material in the damascene trench; and completing the CMOS structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.