Patent · US Expired

Integrated semiconductor memory

US7206980B2 · kind B2 · utility

1Cited by

5References

23Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Jürgen Auge · Unterhaching, DE
Manfred Proll · Dorfen, DE
Jorg Kliewer · Birkenfeld, DE
Frank Schroeppel · Taufkirchen, DE

Key dates

Filing date	May 6, 2005
Grant date	Apr 17, 2007
Priority date	—
Expiry date	Sep 29, 2025

Classification

Technology area (CPC G)Physics
CPC primaryG11C29/48
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

An integrated semiconductor memory includes a memory cell array with at least one memory cell, in which a data value is stored, and an evaluation circuit with a counter. During a test of the integrated semiconductor memory, a counter reading of the counter is altered if the data value stored in the memory cell deviates from a desired value. A threshold value is predefined by a control circuit. A programming circuit compares the threshold value on the input side with the instantaneous counter reading of the counter. If the counter reading of the counter exceeds the threshold value, a programming element changes from a first programming state to a second programming state. After the conclusion of the test, the state of the programming element is read out via an output terminal. This scheme makes it possible to deduce a possible cause of failure of the integrated semiconductor memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.