Deposition of silicon germanium on silicon-on-insulator structures and bulk substrates
US7208354B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 23, 2004 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Aug 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/01
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods are provided for producing SiGe-on-insulator structures and for forming strain-relaxed SiGe layers on silicon while minimizing defects. Amorphous SiGe layers are deposited by CVD from trisilane and GeH4. The amorphous SiGe layers are recrystallized over silicon by melt or solid phase epitaxy (SPE) processes. The melt processes preferably also cause diffusion of germanium to dilute the overall germanium content and essentially consume the silicon overlying the insulator. The SPE process can be conducted with or without diffusion of germanium into the underlying silicon, and so is applicable to SOI as well as conventional semiconductor substrates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.