CMOS logic gate fabricated on hybrid crystal orientations and method of forming thereof

US7208815B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Hung-Wei Chen · Zhubei City, TW
• Ping-Kun Wu · Wang'an Town, TW
• Chao-Hsiung Wang · Baoshan, TW
• Fu-Liang Yang · Baoshan, TW
• Chenming Hu · Alamo, US

Key dates

• Filing date: Nov 15, 2004
• Grant date: Apr 24, 2007
• Expiry date: Feb 26, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/62

Abstract

In preferred embodiments of the present invention, a method of forming CMOS devices using SOI and hybrid substrate orientations is described. In accordance with a preferred embodiment, a substrate may have multiple crystal orientations. One logic gate in the substrate may comprise at least one N-FET on one crystal orientation and at least one P-FET on another crystal orientation. Another logic gate in the substrate may comprise at least one N-FET and at least one P-FET on the same orientation. Alternative embodiments further include determining the preferred cleavage planes of the substrates and orienting the substrates relative to each other in view of their respective preferred cleavage planes. In a preferred embodiment, the cleavage planes are not parallel.