Phase change memory cell with high read margin at low power operation
US7214958B2 · kind B2 · utility
199Cited by
5References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 8, 2005 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Apr 8, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/52
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory cell device includes a first electrode, phase-change material adjacent the first electrode, a second electrode adjacent the phase-change material, a diffusion barrier adjacent the phase-change material, and isolation material adjacent the diffusion barrier for thermally isolating the phase-change material. The diffusion barrier prevents diffusion of the phase-change material into the isolation material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.