Semiconductor device and method for fabricating the device
US7217631B2 · kind B2 · utility
Assignees
Inventor
Key dates
| Filing date | Mar 11, 2005 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Nov 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19041
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There are provided a semiconductor device and method for fabricating the device capable of achieving reliable electrical connection by securely directly bonding conductors to each other even though bonding surfaces are polished by a CMP method and solid-state-bonded to each other. By polishing according to the CMP method, a through hole conductor 5 and a grounding wiring layer 10, which are made of copper, become concave in a dish-like shape and lowered in level, causing a dishing portion 17 since they have a hardness lower than that of a through hole insulator 11 made of silicon nitride. The through hole insulator 11 is selectively etched by a reactive ion etching method until the through hole insulator 11 comes to have a height equal to the height of a bottom portion 19 of the dishing portion 17 of the through hole conductor 5. The through hole conductors 5 and 25 are aligned with each other, and the bonding surfaces 12 and 22 are bonded to each other in a solid state bonding manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.