Last-first mode and method for programming of non-volatile memory with reduced program disturb
US7218552B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2005 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Sep 9, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5648
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory is programmed in a manner which reduces the incidence of program disturb for inhibited memory elements which undergo boosting to reduce program disturb, but which experience reduced boosting benefits due to their word line location. To achieve this result, a word line sequence in which the memory elements are programmed is adjusted so that higher word lines are programmed first, out of sequence relative to the remaining word lines. Additionally, self-boosting can be used for the higher word lines, while erased area self-boosting or a variant can be used for the remaining word lines. Furthermore, pre-charging of the channel of the inhibited memory elements may be employed prior to the self boosting, for the non-volatile storage elements which are programmed after those associated with the first word line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.