Sequential lithographic methods to reduce stacking fault nucleation sites
US7226805B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 2006 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Jun 22, 2026 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/931
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An epitaxial silicon carbide layer is fabricated by forming first features in a surface of a silicon carbide substrate having an off-axis orientation toward a crystallographic direction. The first features include at least one sidewall that is orientated nonparallel (i.e., oblique or perpendicular) to the crystallographic direction. A first epitaxial silicon carbide layer is then grown on the surface of the silicon carbide substrate that includes first features therein. Second features are then formed in the first epitaxial layer. The second features include at least one sidewall that is oriented nonparallel to the crystallographic direction. A second epitaxial silicon carbide layer is then grown on the surface of the first epitaxial silicon carbide layer that includes the second features therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.