Architecture for general purpose programmable semiconductor processing system and methods therefor
US7228257B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2003 |
| Grant date | Jun 5, 2007 |
| Priority date | — |
| Expiry date | Jun 25, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P90/80
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A method of optimizing a set of steps in a semi-conductor processing system comprising a software control program, wherein the semi-conductor processing system includes a first function, a second function, and a third function, and further includes a memory for storing a set of variables, and wherein the set of steps further includes a first step, a second step, and a third step. The invention includes generating the first step on an editor application, wherein the first function is added to the first step, and if required, a first set of user input instructions is added. The invention also includes generating the second step on the editor application, wherein the second function is added to the second step, and if required, a second set of user input instructions is added; and generating the third step on the editor application, wherein the third function is added to the third step, and if required, a third set of user input instructions is added. The invention further includes placing the first step, the second step, and the third step in a proper order; transferring the set of steps to the semi-conductor processing system; executing the set of steps; storing a set of results in …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.