Folding for a multi-threaded network processor
US7240164B2 · kind B2 · utility
5Cited by
0References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 14, 2003 |
| Grant date | Jul 3, 2007 |
| Priority date | — |
| Expiry date | Aug 29, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0804
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A mechanism to process units of data associated with a dependent data stream using different threads of execution and a common data structure in memory. Accessing the common data structure in memory for the processing uses a single read operation and a single write operation. The folding of multiple read-modify-write memory operations in such a manner for multiple multi-threaded stages of processing includes controlling a first stage, which operates on the same data unit as a second stage to pass context state information to the second stage for coherency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.