Clock control circuit for test that facilitates an at speed structural test

US7240266B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Henry R. Farmer · Colchester, US
• Gary D. Grise · Colchester, US
• David W. Milton · Underhill, US
• Mark R. Taylor · South Burlington, US

Key dates

• Filing date: Feb 18, 2005
• Grant date: Jul 3, 2007
• Expiry date: May 28, 2025

Classification

• Technology area (CPC G): Physics
• CPC primary: G01R31/318533
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

When testing an ASIC using functional clocks, a control circuit at the clock root incorporates additional test logic in the root and a deskewer for clock control, giving rise to a very flexible control that can pass clock signals at a number of clock rates and can pass only a single clock edge, thereby permitting the passage of the required number of clock pulses for a test. The system uses the functional clock and the clock distribution tree designed into the ASIC.