Drive current improvement from recessed SiGe incorporation close to gate

US7244654B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• PR Chidambaram · Richardson, US
• Douglas T. Grider · McKinney, US
• Brian Smith · Plano, US
• Haowen Bu · Plano, US
• Lindsey Hall · Pleasant Valley, US

Key dates

• Filing date: Jul 29, 2004
• Grant date: Jul 17, 2007
• Expiry date: Nov 22, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/021

Abstract

A method (100) of forming a transistor includes forming a gate structure (106, 108) over a semiconductor body and forming recesses (112) substantially aligned to the gate structure in the semiconductor body. Silicon germanium is then epitaxially grown (114) in the recesses, followed by forming sidewall spacers (118) over lateral edges of the gate structure. The method continues by implanting source and drain regions in the semiconductor body (120) after forming the sidewall spacers. The silicon germanium formed in the recesses resides close to the transistor channel and serves to provide a compressive stress to the channel, thereby facilitating improved carrier mobility in PMOS type transistor devices.