Semiconductor device and manufacturing method thereof
US7247890B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2004 |
| Grant date | Jul 24, 2007 |
| Priority date | — |
| Expiry date | May 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
Abstract
Disclosed is herein a semiconductor device having a DRAM with less scattering of threshold voltage of MISFET in a memory cell and having good charge retainability of a capacitor, and a manufacturing method of the semiconductor device. An anti-oxidation film is formed to the side wall of a gate electrode before light oxidation thereby suppressing the oxidation of the side wall for the gate electrode and decreasing scattering of the thickness of the film formed to the sidewall in an asymmetric diffusion region structure in which the impurity concentration of an n-type semiconductor region and a p-type semiconductor region on the side of the data line is made relatively higher than the impurity concentration in the n-type semiconductor region and p-type semiconductor region on the side of the capacitor, respectively.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.