Integrated circuit package and method
US7253504B1 · kind B1 · utility
10Cited by
24References
22Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 13, 2004 |
| Grant date | Aug 7, 2007 |
| Priority date | — |
| Expiry date | Aug 10, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/068
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit package includes a substrate having a central axis dividing the substrate into an upper half and a lower half and an integrated circuit coupled to the substrate. A layer is provided within the substrate in the lower half thereof that is configured to resist warpage of the integrated circuit package, the layer provided a distance from the central axis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.