Test mode for IPP current measurement for wordline defect detection
US7257038B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 3, 2006 |
| Grant date | Aug 14, 2007 |
| Priority date | — |
| Expiry date | Jan 22, 2026 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5006
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor integrated circuit memory device, and test method for a memory device are provided in which an external wordline voltage is applied to a wordline of the memory device. A current on the wordline is measured as a result of application of the externally supplied wordline voltage. The measured current is compared to a reference value to determine whether the wordline has a defect, in particular a short-circuit defect. A tester device is connected to the memory device and supplies the external wordline voltage. The current measurement and comparison may be made internally by circuitry on the memory device or externally by circuitry in a tester device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.