3-D inductor and transformer devices in MRAM embedded integrated circuits
US7262069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 2005 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Sep 29, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An integrated circuit device includes a magnetic random access memory (“MRAM”) architecture and at least one inductance element formed on the same substrate using the same fabrication process technology. The inductance element, which may be an inductor or a transformer, is formed at the same metal layer (or layers) as the program lines of the MRAM architecture. Any available metal layer in addition to the program line layers can be added to the inductance element to enhance its efficiency. The concurrent fabrication of the MRAM architecture and the inductance element facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate, resulting in three-dimensional integration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.