Methods of forming semiconductor structures
US7262089B2 · kind B2 · utility
89Cited by
23References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2004 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Nov 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/488
Abstract
The invention includes semiconductor structures having buried silicide-containing bitlines. Vertical surround gate transistor structures can be formed over the bitlines. The surround gate transistor structures can be incorporated into memory devices, such as, for example, DRAM devices. The invention can be utilized for forming 4F2 DRAM devices.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.