Vertical insulated gate transistor and manufacturing method

US7262460B2 · kind B2 · utility

Assignee

• NXP B.V. · NL

Inventors

• Jurriaan Schmitz · Eindhoven, NL
• Raymond J. E. Hueting · Helmond, NL
• Erwin Hijzen · Eindhoven, NL
• Andreas Hubertus Montree · Leuven, BE
• Michael A. A. In't Zandt · Veldhoven, NL
• Gerrit Elbert Johannes Koops · Leuven, BE

Key dates

• Filing date: Dec 8, 2003
• Grant date: Aug 28, 2007
• Expiry date: Jul 15, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/516

Abstract

A vertical insulated gate transistor is manufactured by providing a trench (26) extending through a source layer (8) and a channel layer (6) towards a drain layer (2). A spacer etch is used to form gate portions (20) along the trench side walls, a dielectric material (30) is filled into the trench between the sidewalls gate portions (20), and a gate electrical connection layer (30) is formed at the top of the trench electrically connecting the gate portions (20) across the trench.