Method and apparatus for testing a semiconductor structure having top-side and bottom-side connections
US7262615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2005 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Oct 31, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2886
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for testing a semiconductor structure having a set of top-side connections and having a set of bottom-side connections is provided. The method may include providing a device socket for connecting the set of top-side connections and the set of bottom-side connections to a tester. The method may further include providing a device hood for connecting the set of top-side connections to a respective first end of each of a plurality of interconnects in the device hood, wherein a second end of each of the plurality of interconnects in the device hood connects the set of top-side connections to the device socket. The method may further include testing the semiconductor structure using the tester. The semiconductor structure may include at least one integrated circuit to be tested.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.