System and method for validating a memory file that links speculative results of load operations to register values
US7263600B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2004 |
| Grant date | Aug 28, 2007 |
| Priority date | — |
| Expiry date | Mar 18, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3861
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for linking speculative results of load operations to register values. A system includes a memory file including an entry configured to store a first addressing pattern and a first tag. The memory file is configured to compare the first addressing pattern to a second addressing pattern of a load operation, and to link a data value identified by the first tag to a speculative result of the load operation if there is a match. The system further includes an execution core coupled to the memory file and configured to access the speculative result when executing a second operation that is dependent on the load operation, and a load store unit coupled to the memory file and configured to verify the link between the data value and the speculative result of the load operation by performing a comparison between one or more addresses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.