Passive elements in MRAM embedded integrated circuits
US7264985B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2005 |
| Grant date | Sep 4, 2007 |
| Priority date | — |
| Expiry date | Oct 13, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/22
Abstract
An integrated circuit device (300) comprises a substrate (301) and MRAM architecture (314) formed on the substrate (308). The MRAM architecture (314) includes a MRAM circuit (318) formed on the substrate (301); and a MRAM cell (316) coupled to and formed above the MRAM circuit (318). Additionally a passive device (320) is formed in conjunction with the MRAM cell (316). The passive device (320) can be one or more resistors and one or more capacitor. The concurrent fabrication of the MRAM architecture (314) and the passive device (320) facilitates an efficient and cost effective use of the physical space available over active circuit blocks of the substrate (404, 504), resulting in three-dimensional integration.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.